1. Technical Field
The present disclosure relates to a drive circuit and semiconductor device, and in particular, relates to a drive circuit and semiconductor device that drives a high side power device of two power devices connected in a totem pole configuration.
2. Description of Related Art
A circuit configuration wherein power devices are connected in a totem pole configuration, and each of the high side and low side power devices is driven by a drive circuit, is employed in an inverter or converter. An HV driver IC (HVIC) is known as a high side drive circuit.
An HV driver IC includes a pulse generator circuit that generates a signal causing the high side power device to be turned on or off, a level shift circuit, and a high side drive circuit that drives the high side power device in accordance with a signal transmitted via the level shift circuit. The level shift circuit shifts the level of a signal generated with the ground potential as a reference by the pulse generator circuit, and transmits the signal to the high side drive circuit installed on the high side. At this time, a signal of an amplitude that varies between the ground potential and the high side power supply potential of the HV driver IC is generated in the level shift circuit. The high side drive circuit receives voltage of that kind of amplitude, and carries out a drive that turns the high side power device on or off.
Herein, a connection point of the low side power device and high side power device, that is, a midpoint of the totem pole, is connected to a load. Therefore, external noise caused by load and parasitic inductance may be superimposed on the totem pole midpoint. At such a time, the totem pole midpoint potential is in an overshooting or undershooting state, because of which the totem pole midpoint potential reaches a potential equal to or greater than a high-voltage potential of the high side power device, or reaches a potential equal to or lower than the ground potential.
In the event that a signal is output from the pulse generator circuit at a timing at which the totem pole midpoint potential becomes lower than the ground potential, the level shift circuit is unable to transmit the signal normally to the high side drive circuit. In this case, the high side power device cannot be turned off at a timing at which it should be turned off, thus remaining in an on-state, or cannot be turned on at a timing at which it should be turned on, thus remaining in an off-state, and the true switching function cannot be maintained.
Herein, there is technology responding to being unable to turn off the high side power device at a timing at which it should be turned off (for example, JP-A-2004-120152), and technology responding to being unable to turn on the high side power device at a timing at which it should be turned on (for example, JP-A-2005-130355). According to the technology of JP-A-2004-120152, a second turn-off pulse signal is output after the elapse of a predetermined time from a first turn-off pulse signal being output. Therefore, even when the first turn-off pulse signal cannot be transmitted normally through the level shift circuit, the second turn-off pulse signal can be transmitted normally through the level shift circuit. Similarly, the technology of JP-A-2005-130355 is such that a second turn-on pulse signal is output after the elapse of a predetermined time from a first turn-on pulse signal being output. Therefore, even when the first turn-on pulse signal cannot be transmitted normally through the level shift circuit, the second turn-on pulse signal can be transmitted normally through the level shift circuit.